TAG
Memory Model
3 articles
- Concurrency Programming (1): Start with the Hardware — From count++ to Atomicity, Visibility, and Ordering
Starting from the von Neumann architecture and instruction execution, this article follows count++ down to the hardware-level problems of atomicity, visibility, and ordering.
- Concurrency Programming (2): Language Memory Models — Rules Programmers Can Rely On
Moves from hardware memory models back to the language layer: why languages need their own concurrency semantics, and what Java, Go, and CPython guarantee to concurrent programs.
- Concurrency Programming (7): volatile — From Language Semantics to the CPU
Uses the counter + ready example to trace Java volatile from the Java Memory Model through HotSpot to x86-64, showing how visibility and ordering are defined and implemented, and how volatile differs from atomics and mutexes.