DMA

1. DMA

Direct Memory Access lets the CPU hand data-transfer work to DMA.

For example, when moving data from an I/O device into memory:

1. The CPU configures the DMA transfer.
2. The CPU goes off to do other things.
3. DMA reads data from the I/O device.
4. DMA transfers the data into memory.
5. DMA notifies the CPU through an interrupt when the transfer completes.

In a traditional shared-bus model, the CPU and DMA share the bus through arbitration.

The CPU and DMA take turns occupying the bus to improve efficiency during data transfer and avoid the CPU monopolizing the bus. When the DMA controller needs to transfer data, it sends a request to the CPU and asks the CPU to temporarily give up the bus. After the CPU finishes the current instruction cycle, it releases the bus so that the DMA controller can perform the data transfer.

• Request the bus: when data transfer is needed, the DMA controller sends a request to the CPU to occupy the bus.
• Release the bus: after completing the current instruction cycle, the CPU releases the bus and gives bus control to the DMA controller.
• Perform data transfer: after gaining control of the bus, the DMA controller transfers data directly between memory and the I/O device without CPU intervention.
• Return the bus: after the transfer is complete, the DMA controller releases the bus and returns control to the CPU so the CPU can continue other work.

This alternating mode lets the CPU focus on computation while handing high-bandwidth I/O work such as data transfer to the DMA controller, improving overall system performance.